USB Host Shield 2.0
usbhost.h
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1 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
2 
3 This program is free software; you can redistribute it and/or modify
4 it under the terms of the GNU General Public License as published by
5 the Free Software Foundation; either version 2 of the License, or
6 (at your option) any later version.
7 
8 This program is distributed in the hope that it will be useful,
9 but WITHOUT ANY WARRANTY; without even the implied warranty of
10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 GNU General Public License for more details.
12 
13 You should have received a copy of the GNU General Public License
14 along with this program; if not, write to the Free Software
15 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 
17 Contact information
18 -------------------
19 
20 Circuits At Home, LTD
21 Web : http://www.circuitsathome.com
22 e-mail : support@circuitsathome.com
23  */
24 /* MAX3421E-based USB Host Library header file */
25 
26 
27 #if !defined(_usb_h_) || defined(_USBHOST_H_)
28 #error "Never include usbhost.h directly; include Usb.h instead"
29 #else
30 #define _USBHOST_H_
31 
32 #if USING_SPI4TEENSY3
33 #include <spi4teensy3.h>
34 #include <sys/types.h>
35 #endif
36 
37 /* SPI initialization */
38 template< typename SPI_CLK, typename SPI_MOSI, typename SPI_MISO, typename SPI_SS > class SPi {
39 public:
40 #if USING_SPI4TEENSY3
41  static void init() {
42  // spi4teensy3 inits everything for us, except /SS
43  // CLK, MOSI and MISO are hard coded for now.
44  // spi4teensy3::init(0,0,0); // full speed, cpol 0, cpha 0
45  spi4teensy3::init(); // full speed, cpol 0, cpha 0
46  SPI_SS::SetDirWrite();
47  SPI_SS::Set();
48  }
49 #elif defined(SPI_HAS_TRANSACTION)
50  static void init() {
51  USB_SPI.begin(); // The SPI library with transaction will take care of setting up the pins - settings is set in beginTransaction()
52  SPI_SS::SetDirWrite();
53  SPI_SS::Set();
54  }
55 #elif defined(STM32F4)
56 #warning "You need to initialize the SPI interface manually when using the STM32F4 platform"
57  static void init() {
58  // Should be initialized by the user manually for now
59  }
60 #elif !defined(SPDR)
61  static void init() {
62  SPI_SS::SetDirWrite();
63  SPI_SS::Set();
64  USB_SPI.begin();
65 #if defined(__MIPSEL__)
66  USB_SPI.setClockDivider(1);
67 #elif defined(__ARDUINO_X86__)
68  #ifdef SPI_CLOCK_1M // Hack used to check if setClockSpeed is available
69  USB_SPI.setClockSpeed(12000000); // The MAX3421E can handle up to 26MHz, but in practice this was the maximum that I could reliably use
70  #else
71  USB_SPI.setClockDivider(SPI_CLOCK_DIV2); // This will set the SPI frequency to 8MHz - it could be higher, but it is not supported in the old API
72  #endif
73 #elif !defined(RBL_NRF51822) && !defined(NRF52_SERIES)
74  USB_SPI.setClockDivider(4); // Set speed to 84MHz/4=21MHz - the MAX3421E can handle up to 26MHz
75 #endif
76  }
77 #else
78  static void init() {
79  //uint8_t tmp;
80  SPI_CLK::SetDirWrite();
81  SPI_MOSI::SetDirWrite();
82  SPI_MISO::SetDirRead();
83  SPI_SS::SetDirWrite();
84  /* mode 00 (CPOL=0, CPHA=0) master, fclk/2. Mode 11 (CPOL=11, CPHA=11) is also supported by MAX3421E */
85  SPCR = 0x50;
86  SPSR = 0x01; // 0x01
87 
88  //tmp = SPSR;
89  //tmp = SPDR;
90  }
91 #endif
92 };
93 
94 /* SPI pin definitions. see avrpins.h */
95 #if defined(PIN_SPI_SCK) && defined(PIN_SPI_MOSI) && defined(PIN_SPI_MISO) && defined(PIN_SPI_SS)
96 // Use pin defines: https://github.com/arduino/Arduino/pull/4814
97 // Based on: https://www.mikeash.com/pyblog/friday-qa-2015-03-20-preprocessor-abuse-and-optional-parentheses.html
98 #define NOTHING_EXTRACT
99 #define EXTRACT(...) EXTRACT __VA_ARGS__
100 #define PASTE(x, ...) x ## __VA_ARGS__
101 #define EVALUATING_PASTE(x, ...) PASTE(x, __VA_ARGS__)
102 #define UNPAREN(x) EVALUATING_PASTE(NOTHING_, EXTRACT x)
103 #define APPEND_PIN(pin) P ## pin // Appends the pin to 'P', e.g. 1 becomes P1
104 #define MAKE_PIN(x) EVALUATING_PASTE(APPEND_, PIN(UNPAREN(x)))
105 typedef SPi< MAKE_PIN(PIN_SPI_SCK), MAKE_PIN(PIN_SPI_MOSI), MAKE_PIN(PIN_SPI_MISO), MAKE_PIN(PIN_SPI_SS) > spi;
106 #undef MAKE_PIN
107 #elif defined(__AVR_ATmega1280__) || (__AVR_ATmega2560__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
108 typedef SPi< Pb1, Pb2, Pb3, Pb0 > spi;
109 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
110 typedef SPi< Pb5, Pb3, Pb4, Pb2 > spi;
111 #elif defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__)
112 typedef SPi< Pb7, Pb5, Pb6, Pb4 > spi;
113 #elif (defined(CORE_TEENSY) && (defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__))) || defined(__ARDUINO_ARC__) || defined(__ARDUINO_X86__) || defined(__MIPSEL__) || defined(STM32F4) || defined(ARDUINO_UNOR4_MINIMA) || defined(ARDUINO_UNOR4_WIFI)
114 typedef SPi< P13, P11, P12, P10 > spi;
115 #elif defined(ARDUINO_SAM_DUE) && defined(__SAM3X8E__)
116 typedef SPi< P76, P75, P74, P10 > spi;
117 #elif defined(RBL_NRF51822)
118 typedef SPi< P16, P18, P17, P10 > spi;
119 #elif defined(ESP8266)
120 typedef SPi< P14, P13, P12, P15 > spi;
121 #elif defined(ARDUINO_XIAO_ESP32S3)
122 typedef SPi< P7, P9, P8, P44 > spi;
123 #elif defined(ESP32)
124 typedef SPi< P18, P23, P19, P5 > spi;
125 #elif defined(ARDUINO_NRF52840_FEATHER) || defined(ARDUINO_NRF52840_FEATHER_SENSE)
126 typedef SPi< P26, P25, P24, P5 > spi;
127 #elif defined(ARDUINO_Seeed_XIAO_nRF52840_Sense)
128 typedef SPi< P8, P10, P9, P7 > spi;
129 #else
130 #error "No SPI entry in usbhost.h"
131 #endif
132 
133 typedef enum {
134  vbus_on = 0,
137 
138 template< typename SPI_SS, typename INTR > class MAX3421e /* : public spi */ {
139  static uint8_t vbusState;
140 
141 public:
142  MAX3421e();
143  void regWr(uint8_t reg, uint8_t data);
144  uint8_t* bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
145  void gpioWr(uint8_t data);
146  uint8_t regRd(uint8_t reg);
147  uint8_t* bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
148  uint8_t gpioRd();
149  uint8_t gpioRdOutput();
150  uint16_t reset();
151  int8_t Init();
152  int8_t Init(int mseconds);
153 
154  void vbusPower(VBUS_t state) {
155  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | state));
156  }
157 
158  uint8_t getVbusState(void) {
159  return vbusState;
160  };
161  void busprobe();
162  uint8_t GpxHandler();
163  uint8_t IntHandler();
164  uint8_t Task();
165 };
166 
167 template< typename SPI_SS, typename INTR >
169 
170 /* constructor */
171 template< typename SPI_SS, typename INTR >
173  // Leaving ADK hardware setup in here, for now. This really belongs with the other parts.
174 #ifdef BOARD_MEGA_ADK
175  // For Mega ADK, which has a Max3421e on-board, set MAX_RESET to output mode, and then set it to HIGH
176  P55::SetDirWrite();
177  P55::Set();
178 #endif
179 };
180 
181 /* write single byte into MAX3421 register */
182 template< typename SPI_SS, typename INTR >
183 void MAX3421e< SPI_SS, INTR >::regWr(uint8_t reg, uint8_t data) {
185 #if defined(SPI_HAS_TRANSACTION)
186  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
187 #endif
188  SPI_SS::Clear();
189 
190 #if USING_SPI4TEENSY3
191  uint8_t c[2];
192  c[0] = reg | 0x02;
193  c[1] = data;
194  spi4teensy3::send(c, 2);
195 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
196  uint8_t c[2];
197  c[0] = reg | 0x02;
198  c[1] = data;
199  USB_SPI.transfer(c, 2);
200 #elif defined(STM32F4)
201  uint8_t c[2];
202  c[0] = reg | 0x02;
203  c[1] = data;
204  HAL_SPI_Transmit(&SPI_Handle, c, 2, HAL_MAX_DELAY);
205 #elif !defined(SPDR) // ESP8266, ESP32
206  USB_SPI.transfer(reg | 0x02);
207  USB_SPI.transfer(data);
208 #else
209  SPDR = (reg | 0x02);
210  while(!(SPSR & (1 << SPIF)));
211  SPDR = data;
212  while(!(SPSR & (1 << SPIF)));
213 #endif
214 
215  SPI_SS::Set();
216 #if defined(SPI_HAS_TRANSACTION)
217  USB_SPI.endTransaction();
218 #endif
220  return;
221 };
222 /* multiple-byte write */
223 
224 /* returns a pointer to memory position after last written */
225 template< typename SPI_SS, typename INTR >
226 uint8_t* MAX3421e< SPI_SS, INTR >::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
228 #if defined(SPI_HAS_TRANSACTION)
229  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
230 #endif
231  SPI_SS::Clear();
232 
233 #if USING_SPI4TEENSY3
234  spi4teensy3::send(reg | 0x02);
235  spi4teensy3::send(data_p, nbytes);
236  data_p += nbytes;
237 #elif defined(STM32F4)
238  uint8_t data = reg | 0x02;
239  HAL_SPI_Transmit(&SPI_Handle, &data, 1, HAL_MAX_DELAY);
240  HAL_SPI_Transmit(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
241  data_p += nbytes;
242 #elif !defined(__AVR__) || !defined(SPDR)
243 #if defined(ESP8266) || defined(ESP32)
244  yield();
245 #endif
246  USB_SPI.transfer(reg | 0x02);
247  while(nbytes) {
248  USB_SPI.transfer(*data_p);
249  nbytes--;
250  data_p++; // advance data pointer
251  }
252 #else
253  SPDR = (reg | 0x02); //set WR bit and send register number
254  while(nbytes) {
255  while(!(SPSR & (1 << SPIF))); //check if previous byte was sent
256  SPDR = (*data_p); // send next data byte
257  nbytes--;
258  data_p++; // advance data pointer
259  }
260  while(!(SPSR & (1 << SPIF)));
261 #endif
262 
263  SPI_SS::Set();
264 #if defined(SPI_HAS_TRANSACTION)
265  USB_SPI.endTransaction();
266 #endif
268  return ( data_p);
269 }
270 /* GPIO write */
271 /*GPIO byte is split between 2 registers, so two writes are needed to write one byte */
272 
273 /* GPOUT bits are in the low nibble. 0-3 in IOPINS1, 4-7 in IOPINS2 */
274 template< typename SPI_SS, typename INTR >
276  regWr(rIOPINS1, data);
277  data >>= 4;
278  regWr(rIOPINS2, data);
279  return;
280 }
281 
282 /* single host register read */
283 template< typename SPI_SS, typename INTR >
284 uint8_t MAX3421e< SPI_SS, INTR >::regRd(uint8_t reg) {
286 #if defined(SPI_HAS_TRANSACTION)
287  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
288 #endif
289  SPI_SS::Clear();
290 
291 #if USING_SPI4TEENSY3
292  spi4teensy3::send(reg);
293  uint8_t rv = spi4teensy3::receive();
294  SPI_SS::Set();
295 #elif defined(STM32F4)
296  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
297  uint8_t rv = 0;
298  HAL_SPI_Receive(&SPI_Handle, &rv, 1, HAL_MAX_DELAY);
299  SPI_SS::Set();
300 #elif !defined(SPDR) || defined(SPI_HAS_TRANSACTION)
301  USB_SPI.transfer(reg);
302  uint8_t rv = USB_SPI.transfer(0); // Send empty byte
303  SPI_SS::Set();
304 #else
305  SPDR = reg;
306  while(!(SPSR & (1 << SPIF)));
307  SPDR = 0; // Send empty byte
308  while(!(SPSR & (1 << SPIF)));
309  SPI_SS::Set();
310  uint8_t rv = SPDR;
311 #endif
312 
313 #if defined(SPI_HAS_TRANSACTION)
314  USB_SPI.endTransaction();
315 #endif
317  return (rv);
318 }
319 /* multiple-byte register read */
320 
321 /* returns a pointer to a memory position after last read */
322 template< typename SPI_SS, typename INTR >
323 uint8_t* MAX3421e< SPI_SS, INTR >::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
325 #if defined(SPI_HAS_TRANSACTION)
326  USB_SPI.beginTransaction(SPISettings(26000000, MSBFIRST, SPI_MODE0)); // The MAX3421E can handle up to 26MHz, use MSB First and SPI mode 0
327 #endif
328  SPI_SS::Clear();
329 
330 #if USING_SPI4TEENSY3
331  spi4teensy3::send(reg);
332  spi4teensy3::receive(data_p, nbytes);
333  data_p += nbytes;
334 #elif defined(SPI_HAS_TRANSACTION) && !defined(ESP8266) && !defined(ESP32)
335  USB_SPI.transfer(reg);
336  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
337  USB_SPI.transfer(data_p, nbytes);
338  data_p += nbytes;
339 #elif defined(__ARDUINO_X86__)
340  USB_SPI.transfer(reg);
341  USB_SPI.transferBuffer(NULL, data_p, nbytes);
342  data_p += nbytes;
343 #elif defined(STM32F4)
344  HAL_SPI_Transmit(&SPI_Handle, &reg, 1, HAL_MAX_DELAY);
345  memset(data_p, 0, nbytes); // Make sure we send out empty bytes
346  HAL_SPI_Receive(&SPI_Handle, data_p, nbytes, HAL_MAX_DELAY);
347  data_p += nbytes;
348 #elif !defined(SPDR) // ESP8266, ESP32
349  yield();
350  USB_SPI.transfer(reg);
351  while(nbytes) {
352  *data_p++ = USB_SPI.transfer(0);
353  nbytes--;
354  }
355 #else
356  SPDR = reg;
357  while(!(SPSR & (1 << SPIF))); //wait
358  while(nbytes) {
359  SPDR = 0; // Send empty byte
360  nbytes--;
361  while(!(SPSR & (1 << SPIF)));
362 #if 0
363  {
364  *data_p = SPDR;
365  printf("%2.2x ", *data_p);
366  }
367  data_p++;
368  }
369  printf("\r\n");
370 #else
371  *data_p++ = SPDR;
372  }
373 #endif
374 #endif
375 
376  SPI_SS::Set();
377 #if defined(SPI_HAS_TRANSACTION)
378  USB_SPI.endTransaction();
379 #endif
381  return ( data_p);
382 }
383 /* GPIO read. See gpioWr for explanation */
384 
388 /* GPIN pins are in high nibbles of IOPINS1, IOPINS2 */
389 template< typename SPI_SS, typename INTR >
391  uint8_t gpin = 0;
392  gpin = regRd(rIOPINS2); //pins 4-7
393  gpin &= 0xf0; //clean lower nibble
394  gpin |= (regRd(rIOPINS1) >> 4); //shift low bits and OR with upper from previous operation.
395  return ( gpin);
396 }
397 
401 /* GPOUT pins are in low nibbles of IOPINS1, IOPINS2 */
402 template< typename SPI_SS, typename INTR >
404  uint8_t gpout = 0;
405  gpout = regRd(rIOPINS1); //pins 0-3
406  gpout &= 0x0f; //clean upper nibble
407  gpout |= (regRd(rIOPINS2) << 4); //shift high bits and OR with lower from previous operation.
408  return ( gpout);
409 }
410 
411 /* reset MAX3421E. Returns number of cycles it took for PLL to stabilize after reset
412  or zero if PLL haven't stabilized in 65535 cycles */
413 template< typename SPI_SS, typename INTR >
415  uint16_t i = 0;
416  regWr(rUSBCTL, bmCHIPRES);
417  regWr(rUSBCTL, 0x00);
418  while(++i) {
419  if((regRd(rUSBIRQ) & bmOSCOKIRQ)) {
420  break;
421  }
422  }
423  return ( i);
424 }
425 
426 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
427 template< typename SPI_SS, typename INTR >
430  // Moved here.
431  // you really should not init hardware in the constructor when it involves locks.
432  // Also avoids the vbus flicker issue confusing some devices.
433  /* pin and peripheral setup */
434  SPI_SS::SetDirWrite();
435  SPI_SS::Set();
436  spi::init();
437  INTR::SetDirRead();
439  /* MAX3421E - full-duplex SPI, level interrupt */
440  // GPX pin on. Moved here, otherwise we flicker the vbus.
441  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
442 
443  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
444  return ( -1);
445  }
446 
447  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
448 
449  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
450 
451  /* check if device is connected */
452  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
453  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
454 
455  busprobe(); //check if anything is connected
456 
457  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
458  regWr(rCPUCTL, 0x01); //enable interrupt pin
459 
460  return ( 0);
461 }
462 
463 /* initialize MAX3421E. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not */
464 template< typename SPI_SS, typename INTR >
465 int8_t MAX3421e< SPI_SS, INTR >::Init(int mseconds) {
467  // Moved here.
468  // you really should not init hardware in the constructor when it involves locks.
469  // Also avoids the vbus flicker issue confusing some devices.
470  /* pin and peripheral setup */
471  SPI_SS::SetDirWrite();
472  SPI_SS::Set();
473  spi::init();
474  INTR::SetDirRead();
476  /* MAX3421E - full-duplex SPI, level interrupt, vbus off */
477  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | GPX_VBDET));
478 
479  if(reset() == 0) { //OSCOKIRQ hasn't asserted in time
480  return ( -1);
481  }
482 
483  // Delay a minimum of 1 second to ensure any capacitors are drained.
484  // 1 second is required to make sure we do not smoke a Microdrive!
485  if(mseconds < 1000) mseconds = 1000;
486  delay(mseconds);
487 
488  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
489 
490  regWr(rHIEN, bmCONDETIE | bmFRAMEIE); //connection detection
491 
492  /* check if device is connected */
493  regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
494  while(!(regRd(rHCTL) & bmSAMPLEBUS)); //wait for sample operation to finish
495 
496  busprobe(); //check if anything is connected
497 
498  regWr(rHIRQ, bmCONDETIRQ); //clear connection detect interrupt
499  regWr(rCPUCTL, 0x01); //enable interrupt pin
500 
501  // GPX pin on. This is done here so that busprobe will fail if we have a switch connected.
502  regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL));
503 
504  return ( 0);
505 }
506 
507 /* probe bus to determine device presence and speed and switch host to this speed */
508 template< typename SPI_SS, typename INTR >
510  uint8_t bus_sample;
511  bus_sample = regRd(rHRSL); //Get J,K status
512  bus_sample &= (bmJSTATUS | bmKSTATUS); //zero the rest of the byte
513  switch(bus_sample) { //start full-speed or low-speed host
514  case( bmJSTATUS):
515  if((regRd(rMODE) & bmLOWSPEED) == 0) {
516  regWr(rMODE, MODE_FS_HOST); //start full-speed host
517  vbusState = FSHOST;
518  } else {
519  regWr(rMODE, MODE_LS_HOST); //start low-speed host
520  vbusState = LSHOST;
521  }
522  break;
523  case( bmKSTATUS):
524  if((regRd(rMODE) & bmLOWSPEED) == 0) {
525  regWr(rMODE, MODE_LS_HOST); //start low-speed host
526  vbusState = LSHOST;
527  } else {
528  regWr(rMODE, MODE_FS_HOST); //start full-speed host
529  vbusState = FSHOST;
530  }
531  break;
532  case( bmSE1): //illegal state
533  vbusState = SE1;
534  break;
535  case( bmSE0): //disconnected state
536  regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST | bmSEPIRQ);
537  vbusState = SE0;
538  break;
539  }//end switch( bus_sample )
540 }
541 
542 /* MAX3421 state change task and interrupt handler */
543 template< typename SPI_SS, typename INTR >
545  uint8_t rcode = 0;
546  uint8_t pinvalue;
547  //USB_HOST_SERIAL.print("Vbus state: ");
548  //USB_HOST_SERIAL.println( vbusState, HEX );
549  pinvalue = INTR::IsSet(); //Read();
550  //pinvalue = digitalRead( MAX_INT );
551  if(pinvalue == 0) {
552  rcode = IntHandler();
553  }
554  // pinvalue = digitalRead( MAX_GPX );
555  // if( pinvalue == LOW ) {
556  // GpxHandler();
557  // }
558  // usbSM(); //USB state machine
559  return ( rcode);
560 }
561 
562 template< typename SPI_SS, typename INTR >
564  uint8_t HIRQ;
565  uint8_t HIRQ_sendback = 0x00;
566  HIRQ = regRd(rHIRQ); //determine interrupt source
567  //if( HIRQ & bmFRAMEIRQ ) { //->1ms SOF interrupt handler
568  // HIRQ_sendback |= bmFRAMEIRQ;
569  //}//end FRAMEIRQ handling
570  if(HIRQ & bmCONDETIRQ) {
571  busprobe();
572  HIRQ_sendback |= bmCONDETIRQ;
573  }
574  /* End HIRQ interrupts handling, clear serviced IRQs */
575  regWr(rHIRQ, HIRQ_sendback);
576  return ( HIRQ_sendback);
577 }
578 //template< typename SPI_SS, typename INTR >
579 //uint8_t MAX3421e< SPI_SS, INTR >::GpxHandler()
580 //{
581 // uint8_t GPINIRQ = regRd( rGPINIRQ ); //read GPIN IRQ register
588 // return( GPINIRQ );
589 //}
590 
591 #endif // _USBHOST_H_
MAX3421e()
Definition: usbhost.h:172
uint8_t Task()
Definition: usbhost.h:544
uint8_t GpxHandler()
uint16_t reset()
Definition: usbhost.h:414
int8_t Init()
Definition: usbhost.h:428
uint8_t regRd(uint8_t reg)
Definition: usbhost.h:284
void vbusPower(VBUS_t state)
Definition: usbhost.h:154
void busprobe()
Definition: usbhost.h:509
void regWr(uint8_t reg, uint8_t data)
Definition: usbhost.h:183
uint8_t * bytesWr(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:226
uint8_t getVbusState(void)
Definition: usbhost.h:158
uint8_t gpioRd()
Reads the current GPI input values.
Definition: usbhost.h:390
uint8_t gpioRdOutput()
Reads the current GPI output values.
Definition: usbhost.h:403
uint8_t * bytesRd(uint8_t reg, uint8_t nbytes, uint8_t *data_p)
Definition: usbhost.h:323
uint8_t IntHandler()
Definition: usbhost.h:563
void gpioWr(uint8_t data)
Definition: usbhost.h:275
Definition: usbhost.h:38
static void init()
Definition: usbhost.h:61
#define bmFDUPSPI
Definition: max3421e.h:75
#define rIOPINS2
Definition: max3421e.h:100
#define rUSBIRQ
Definition: max3421e.h:50
#define bmFRAMEIE
Definition: max3421e.h:164
#define rIOPINS1
Definition: max3421e.h:88
#define rUSBCTL
Definition: max3421e.h:62
#define rHRSL
Definition: max3421e.h:203
#define rMODE
Definition: max3421e.h:167
#define bmCONDETIE
Definition: max3421e.h:163
#define SE0
Definition: max3421e.h:35
#define MODE_FS_HOST
Definition: max3421e.h:231
#define rCPUCTL
Definition: max3421e.h:67
#define bmSEPIRQ
Definition: max3421e.h:174
#define bmHOST
Definition: max3421e.h:170
#define SE1
Definition: max3421e.h:36
#define bmSE0
Definition: max3421e.h:210
#define rPINCTL
Definition: max3421e.h:73
#define rHCTL
Definition: max3421e.h:181
#define bmDMPULLDN
Definition: max3421e.h:176
#define bmJSTATUS
Definition: max3421e.h:209
#define FSHOST
Definition: max3421e.h:37
#define bmLOWSPEED
Definition: max3421e.h:171
#define rHIRQ
Definition: max3421e.h:144
#define rHIEN
Definition: max3421e.h:155
#define LSHOST
Definition: max3421e.h:38
#define bmCHIPRES
Definition: max3421e.h:64
#define MODE_LS_HOST
Definition: max3421e.h:232
#define bmDPPULLDN
Definition: max3421e.h:177
#define bmINTLEVEL
Definition: max3421e.h:76
#define bmCONDETIRQ
Definition: max3421e.h:151
#define bmSE1
Definition: max3421e.h:211
#define bmOSCOKIRQ
Definition: max3421e.h:54
#define bmSAMPLEBUS
Definition: max3421e.h:185
#define bmKSTATUS
Definition: max3421e.h:208
#define GPX_VBDET
Definition: max3421e.h:82
#define USB_SPI
Definition: settings.h:33
#define XMEM_ACQUIRE_SPI()
Definition: settings.h:134
#define XMEM_RELEASE_SPI()
Definition: settings.h:135
VBUS_t
Definition: usbhost.h:133
@ vbus_on
Definition: usbhost.h:134
@ vbus_off
Definition: usbhost.h:135