USB Host Shield 2.0
cdc_XR21B1411.h
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1 /* Copyright (C) 2015 Andrew J. Kroll
2  and
3  Circuits At Home, LTD. All rights reserved.
4 
5 This software may be distributed and modified under the terms of the GNU
6 General Public License version 2 (GPL2) as published by the Free Software
7 Foundation and appearing in the file GPL2.TXT included in the packaging of
8 this file. Please note that GPL2 Section 2[b] requires that all works based
9 on this software must also be made publicly available under the terms of
10 the GPL2 ("Copyleft").
11 
12 Contact information
13 -------------------
14 
15 Circuits At Home, LTD
16 Web : http://www.circuitsathome.com
17 e-mail : support@circuitsathome.com
18  */
19 #if !defined(__CDC_XR21B1411_H__)
20 #define __CDC_XR21B1411_H__
21 
22 #include "cdcacm.h"
23 
24 #define XR_REG_CUSTOM_DRIVER (0x020DU) // DRIVER SELECT
25 #define XR_REG_CUSTOM_DRIVER_ACTIVE (0x0001U) // 0: CDC 1: CUSTOM
26 
27 #define XR_REG_ACM_FLOW_CTL (0x0216U) // FLOW CONTROL REGISTER CDCACM MODE
28 #define XR_REG_FLOW_CTL (0x0C06U) // FLOW CONTROL REGISTER CUSTOM MODE
29 #define XR_REG_FLOW_CTL_HALF_DPLX (0x0008U) // 0:FULL DUPLEX 1:HALF DUPLEX
30 #define XR_REG_FLOW_CTL_MODE_MASK (0x0007U) // MODE BITMASK
31 #define XR_REG_FLOW_CTL_NONE (0x0000U) // NO FLOW CONTROL
32 #define XR_REG_FLOW_CTL_HW (0x0001U) // HARDWARE FLOW CONTROL
33 #define XR_REG_FLOW_CTL_SW (0x0002U) // SOFTWARE FLOW CONTROL
34 #define XR_REG_FLOW_CTL_MMMRX (0x0003U) // MULTIDROP RX UPON ADDRESS MATCH
35 #define XR_REG_FLOW_CTL_MMMRXTX (0x0004U) // MULTIDROP RX/TX UPON ADDRESS MATCH
36 
37 #define XR_REG_ACM_GPIO_MODE (0x0217U) // GPIO MODE REGISTER IN CDCACM MODE
38 #define XR_REG_GPIO_MODE (0x0C0CU) // GPIO MODE REGISTER IN CUSTOM MODE
39 #define XR_REG_GPIO_MODE_GPIO (0x0000U) // ALL GPIO PINS ACM PROGRAMMABLE
40 #define XR_REG_GPIO_MODE_FC_RTSCTS (0x0001U) // AUTO RTSCTS HW FC (GPIO 4/5)
41 #define XR_REG_GPIO_MODE_FC_DTRDSR (0x0002U) // AUTO DTRDSR HW FC (GPIO 2/3)
42 #define XR_REG_GPIO_MODE_ATE (0x0003U) // AUTO TRANSCEIVER ENABLE DURING TX (GPIO 5)
43 #define XR_REG_GPIO_MODE_ATE_ADDRESS (0x0004U) // AUTO TRANSCEIVER ENABLE ON ADDRESS MATCH (GPIO 5)
44 
45 #define XR_REG_ACM_GPIO_DIR (0x0218U) // GPIO DIRECTION REGISTER CDCACM MODE, 0:IN 1:OUT
46 #define XR_REG_GPIO_DIR (0x0C0DU) // GPIO DIRECTION REGISTER CUSTOM MODE, 0:IN 1:OUT
47 
48 #define XR_REG_ACM_GPIO_INT (0x0219U) // GPIO PIN CHANGE INTERRUPT ENABLE CDCACM MODE, 0: ENABLED 1: DISABLED
49 #define XR_REG_GPIO_INT (0x0C11U) // GPIO PIN CHANGE INTERRUPT ENABLE CUSTOM MODE, 0: ENABLED 1: DISABLED
50 #define XR_REG_GPIO_MASK (0x001FU) // GPIO REGISTERS BITMASK
51 
52 #define XR_REG_UART_ENABLE (0x0C00U) // UART I/O ENABLE REGISTER
53 #define XR_REG_UART_ENABLE_RX (0x0002U) // 0:DISABLED 1:ENABLED
54 #define XR_REG_UART_ENABLE_TX (0x0001U) // 0:DISABLED 1:ENABLED
55 
56 #define XR_REG_ERROR_STATUS (0x0C09U) // ERROR STATUS REGISTER
57 #define XR_REG_ERROR_STATUS_MASK (0x00F8U) // ERROR STATUS BITMASK
58 #define XR_REG_ERROR_STATUS_ERROR (0x0070U) // ERROR STATUS ERROR BITMASK
59 #define XR_REG_ERROR_STATUS_BREAK (0x0008U) // BREAK HAS BEEN DETECTED
60 #define XR_REG_ERROR_STATUS_OVERRUN (0x0010U) // RX OVERRUN ERROR
61 #define XR_REG_ERROR_STATUS_PARITY (0x0020U) // PARITY ERROR
62 #define XR_REG_ERROR_STATUS_FRAME (0x0040U) // FRAMING ERROR
63 #define XR_REG_ERROR_STATUS_BREAKING (0x0080U) // BREAK IS BEING DETECTED
64 
65 #define XR_REG_TX_BREAK (0x0C0AU) // TRANSMIT BREAK. 0X0001-0XFFE TIME IN MS, 0X0000 STOP, 0X0FFF BREAK ON
66 
67 #define XR_REG_XCVR_EN_DELAY (0x0C0BU) // TURN-ARROUND DELAY IN BIT-TIMES 0X0000-0X000F
68 
69 #define XR_REG_GPIO_SET (0x0C0EU) // 1:SET GPIO PIN
70 
71 #define XR_REG_GPIO_CLR (0x0C0FU) // 1:CLEAR GPIO PIN
72 
73 #define XR_REG_GPIO_STATUS (0x0C10U) // READ GPIO PINS
74 
75 #define XR_REG_CUSTOMISED_INT (0x0C12U) // 0:STANDARD 1:CUSTOM SEE DATA SHEET
76 
77 #define XR_REG_PIN_PULLUP_ENABLE (0x0C14U) // 0:DISABLE 1:ENABLE, BITS 0-5:GPIO, 6:RX 7:TX
78 
79 #define XR_REG_PIN_PULLDOWN_ENABLE (0x0C15U) // 0:DISABLE 1:ENABLE, BITS 0-5:GPIO, 6:RX 7:TX
80 
81 #define XR_REG_LOOPBACK (0x0C16U) // 0:DISABLE 1:ENABLE, SEE DATA SHEET
82 
83 #define XR_REG_RX_FIFO_LATENCY (0x0CC2U) // FIFO LATENCY REGISTER
84 #define XR_REG_RX_FIFO_LATENCY_ENABLE (0x0001U) //
85 
86 #define XR_REG_WIDE_MODE (0x0D02U)
87 #define XR_REG_WIDE_MODE_ENABLE (0x0001U)
88 
89 #define XR_REG_XON_CHAR (0x0C07U)
90 #define XR_REG_XOFF_CHAR (0x0C08U)
91 
92 #define XR_REG_TX_FIFO_RESET (0x0C80U) // 1: RESET, SELF-CLEARING
93 #define XR_REG_TX_FIFO_COUNT (0x0C81U) // READ-ONLY
94 #define XR_REG_RX_FIFO_RESET (0x0CC0U) // 1: RESET, SELF-CLEARING
95 #define XR_REG_RX_FIFO_COUNT (0x0CC1U) // READ-ONLY
96 
97 #define XR_WRITE_REQUEST_TYPE (0x40U)
98 
99 #define XR_READ_REQUEST_TYPE (0xC0U)
100 
101 #define XR_MAX_ENDPOINTS 4
102 
103 class XR21B1411 : public ACM {
104 protected:
105 
106 public:
107  XR21B1411(USB *pusb, CDCAsyncOper *pasync);
108 
115  virtual bool VIDPIDOK(uint16_t vid, uint16_t pid) {
116  return (((vid == 0x2890U) && (pid == 0x0201U)) || ((vid == 0x04e2U) && (pid == 0x1411U)));
117  };
118 
119  uint8_t Init(uint8_t parent, uint8_t port, bool lowspeed);
120 
122  tty_features rv;
123  rv.enhanced = true;
124  rv.autoflow_RTS = true;
125  rv.autoflow_DSR = true;
126  rv.autoflow_XON = true;
127  rv.half_duplex = true;
128  rv.wide = true;
129  return rv;
130  };
131 
132  uint8_t read_register(uint16_t reg, uint16_t *val) {
133  return (pUsb->ctrlReq(bAddress, 0, XR_READ_REQUEST_TYPE, 1, 0, 0, reg, 2, 2, (uint8_t *)val, NULL));
134  }
135 
136  uint8_t write_register(uint16_t reg, uint16_t val) {
137  return (pUsb->ctrlReq(bAddress, 0, XR_WRITE_REQUEST_TYPE, 0, BGRAB0(val), BGRAB1(val), reg, 0, 0, NULL, NULL));
138  }
139 
140 
142  // The following methods set the CDC-ACM defaults.
144 
145  virtual void autoflowRTS(bool s) {
146  uint16_t val;
147  uint8_t rval;
148  rval = read_register(XR_REG_ACM_FLOW_CTL, &val);
149  if(!rval) {
150  if(s) {
152  val |= XR_REG_FLOW_CTL_HW;
153  } else {
155  }
156  rval = write_register(XR_REG_ACM_FLOW_CTL, val);
157  if(!rval) {
159  if(!rval) {
160  // ACM commands apply the new settings.
161  LINE_CODING LCT;
162  rval = GetLineCoding(&LCT);
163  if(!rval) {
164  rval = SetLineCoding(&LCT);
165  if(!rval) {
169  }
170  }
171  }
172  }
173  }
174  };
175 
176  virtual void autoflowDSR(bool s) {
177  uint16_t val;
178  uint8_t rval;
179  rval = read_register(XR_REG_ACM_FLOW_CTL, &val);
180  if(!rval) {
181  if(s) {
183  val |= XR_REG_FLOW_CTL_HW;
184  } else {
186  }
187  rval = write_register(XR_REG_ACM_FLOW_CTL, val);
188  if(!rval) {
189  if(s) {
191  } else {
193  }
194  if(!rval) {
195  // ACM commands apply the new settings.
196  LINE_CODING LCT;
197  rval = GetLineCoding(&LCT);
198  if(!rval) {
199  rval = SetLineCoding(&LCT);
200  if(!rval) {
204  }
205  }
206  }
207  }
208  }
209  };
210 
211  virtual void autoflowXON(bool s) {
212  // NOTE: hardware defaults to the normal XON/XOFF
213  uint16_t val;
214  uint8_t rval;
215  rval = read_register(XR_REG_ACM_FLOW_CTL, &val);
216  if(!rval) {
217  if(s) {
219  val |= XR_REG_FLOW_CTL_SW;
220  } else {
222  }
223  rval = write_register(XR_REG_ACM_FLOW_CTL, val);
224  if(!rval) {
226  if(!rval) {
227  // ACM commands apply the new settings.
228  LINE_CODING LCT;
229  rval = GetLineCoding(&LCT);
230  if(!rval) {
231  rval = SetLineCoding(&LCT);
232  if(!rval) {
236  }
237  }
238  }
239  }
240  }
241  };
242 
243  virtual void half_duplex(bool s) {
244  uint16_t val;
245  uint8_t rval;
246  rval = read_register(XR_REG_ACM_FLOW_CTL, &val);
247  if(!rval) {
248  if(s) {
250  } else {
252  }
253  rval = write_register(XR_REG_ACM_FLOW_CTL, val);
254  if(!rval) {
255  // ACM commands apply the new settings.
256  LINE_CODING LCT;
257  rval = GetLineCoding(&LCT);
258  if(!rval) {
259  rval = SetLineCoding(&LCT);
260  if(!rval) {
262  }
263  }
264  }
265  }
266  };
267 
268 
269 
270 };
271 
272 #endif // __CDCPROLIFIC_H__
ACM
Definition: cdcacm.h:163
tty_features::autoflow_DSR
bool autoflow_DSR
Definition: cdcacm.h:154
ACM::pUsb
USB * pUsb
Definition: cdcacm.h:165
XR_REG_ACM_FLOW_CTL
#define XR_REG_ACM_FLOW_CTL
Definition: cdc_XR21B1411.h:27
XR_REG_GPIO_MODE_GPIO
#define XR_REG_GPIO_MODE_GPIO
Definition: cdc_XR21B1411.h:39
XR_WRITE_REQUEST_TYPE
#define XR_WRITE_REQUEST_TYPE
Definition: cdc_XR21B1411.h:97
XR21B1411::autoflowDSR
virtual void autoflowDSR(bool s)
Definition: cdc_XR21B1411.h:176
XR21B1411::VIDPIDOK
virtual bool VIDPIDOK(uint16_t vid, uint16_t pid)
Definition: cdc_XR21B1411.h:115
tty_features::wide
bool wide
Definition: cdcacm.h:152
XR_REG_FLOW_CTL_MODE_MASK
#define XR_REG_FLOW_CTL_MODE_MASK
Definition: cdc_XR21B1411.h:30
XR21B1411::enhanced_features
virtual tty_features enhanced_features(void)
Definition: cdc_XR21B1411.h:121
tty_features::enhanced
bool enhanced
Definition: cdcacm.h:149
XR_REG_FLOW_CTL_HW
#define XR_REG_FLOW_CTL_HW
Definition: cdc_XR21B1411.h:32
XR_REG_FLOW_CTL_HALF_DPLX
#define XR_REG_FLOW_CTL_HALF_DPLX
Definition: cdc_XR21B1411.h:29
XR_REG_GPIO_MODE_FC_DTRDSR
#define XR_REG_GPIO_MODE_FC_DTRDSR
Definition: cdc_XR21B1411.h:41
tty_features::autoflow_XON
bool autoflow_XON
Definition: cdcacm.h:155
USB::ctrlReq
uint8_t ctrlReq(uint8_t addr, uint8_t ep, uint8_t bmReqType, uint8_t bRequest, uint8_t wValLo, uint8_t wValHi, uint16_t wInd, uint16_t total, uint16_t nbytes, uint8_t *dataptr, USBReadParser *p)
Definition: Usb.cpp:126
XR21B1411::half_duplex
virtual void half_duplex(bool s)
Definition: cdc_XR21B1411.h:243
XR_REG_ACM_GPIO_MODE
#define XR_REG_ACM_GPIO_MODE
Definition: cdc_XR21B1411.h:37
XR_READ_REQUEST_TYPE
#define XR_READ_REQUEST_TYPE
Definition: cdc_XR21B1411.h:99
USB
Definition: UsbCore.h:212
ACM::GetLineCoding
uint8_t GetLineCoding(LINE_CODING *dataptr)
Definition: cdcacm.cpp:328
CDCAsyncOper
Definition: cdcacm.h:128
tty_features
Definition: cdcacm.h:143
BGRAB1
#define BGRAB1(__usi__)
Definition: macros.h:57
tty_features::half_duplex
bool half_duplex
Definition: cdcacm.h:156
tty_features::autoflow_RTS
bool autoflow_RTS
Definition: cdcacm.h:153
XR21B1411::Init
uint8_t Init(uint8_t parent, uint8_t port, bool lowspeed)
Definition: cdc_XR21B1411.cpp:25
cdcacm.h
ACM::_enhanced_status
tty_features _enhanced_status
Definition: cdcacm.h:175
XR21B1411::autoflowRTS
virtual void autoflowRTS(bool s)
Definition: cdc_XR21B1411.h:145
XR21B1411::XR21B1411
XR21B1411(USB *pusb, CDCAsyncOper *pasync)
Definition: cdc_XR21B1411.cpp:19
XR21B1411::autoflowXON
virtual void autoflowXON(bool s)
Definition: cdc_XR21B1411.h:211
ACM::bAddress
uint8_t bAddress
Definition: cdcacm.h:167
ACM::SetLineCoding
uint8_t SetLineCoding(const LINE_CODING *dataptr)
Definition: cdcacm.cpp:320
BGRAB0
#define BGRAB0(__usi__)
Definition: macros.h:56
XR21B1411
Definition: cdc_XR21B1411.h:103
XR21B1411::read_register
uint8_t read_register(uint16_t reg, uint16_t *val)
Definition: cdc_XR21B1411.h:132
LINE_CODING
Definition: cdcacm.h:110
XR_REG_FLOW_CTL_SW
#define XR_REG_FLOW_CTL_SW
Definition: cdc_XR21B1411.h:33
XR21B1411::write_register
uint8_t write_register(uint16_t reg, uint16_t val)
Definition: cdc_XR21B1411.h:136